The Senior Engineer in the Microchip Data Center Solutions group, will get
hands-on experience developing our next generation of storage controller SOC products. This will involve taking a design from initial concept to production form. Throughout, you will work alongside experienced engineers and be exposed to Microchip’s Best-In-Class engineering practices. Working side-by-side with some of the brightest minds and most innovative people in the industry, you won't just fill a position, you will be given an opportunity to work on a team where your contributions matter.
The Senior Engineer will be responsible for design, verification, emulation, and/or validation of digital integrated circuits at the block level, top level, and/or solution level. You will be challenged and encouraged to discover the power of innovation. Microchip fosterscontinuous learning in a challenging and rewarding environment. If this sounds like the kind of environment you'd like to participate in, we'd like to hear from you!
Job responsibilities may include any of the following:
• Architecture, design, verification and implementation of digital semiconductor devices including: RTL development, verification, synthesis, physical layout support, static timing analysis and DFT.
• Develop circuits for subsystems using Digital Design techniques. Implement through RTL coding in System Verilog and synthesis into logic gates.
• Design of verification testbenches in System Verilog and execution of test plans using verification methodologies such as UVM.
• Support of products from Specification through to Production by interacting with Engineers in Physical Design, Validation, Applications, Software/Firmware, Product Marketing and Production Engineering
Requirements/Qualifications:
• 4-5 years of industry experience
• Experience with coding and design of synthesizable logic using System Verilog
• Experience with VHDL is an asset
• Experience with low power design techniques is an asset
• Familiar with all aspects of the digital ASIC design flow including RTL design and verification
• Strong coding / scripting skills with languages such as C/C++, Python and Perl
• Experience with Synopsys or Cadence tool flows for synthesis, verification or STA is an asset
• Experience with 3rd party IP integration and support
• Experience with one or more of the following communication protocols (PCIe, CXL, DDR, SAS, SATA)
• Experience with micro-processors is an asset
• Experience with UVM verification methodology is an asset
• Experience with Specman/e verification language is an asset
• Excellent problem solving and debugging skills
• Excellent communication (written and verbal), and documentation skills
• Ability to quickly ramp on new projects
Travel Time:
0% - 25%
Pay Range:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading IESPP program with a 6-month look back feature. Find more information about all our benefits at the link below:
The annual base salary range for this position is $86,000 to $186,000.*
*Range is dependent on numerous factors including job location, skills and experience.
